Modulador sigma-delta com processamento pseudo-paralelo em tecnologia CMOS 130 nm para aplicação em sinais de rede 5G NR

Abstract

In high-frequency systems, data converters are essential to enable proper signal processing within the available dynamic range, thereby preventing significant distortions that may degrade signal quality. In this context, the design of integrated circuits based on CMOS technology has been widely adopted to achieve adequate performance while minimizing area and power consumption. Signals employed in f ifth-generation (5G) networks pose significant challenges, primarily due to their high data rates, wide bandwidth, and increased spectral complexity. Among the techniques adopted in this scenario, Orthogonal Frequency Division Multiple Access (OFDMA), as defined in the 5G NR standard, stands out for its high spectral efficiency and robustness against interference and noise. Accordingly, this work focuses on the use of a 5G NR-compliant OFDMA signal as the input stimulus for the development of a pseudo-parallel sigma–delta modulator (PDSM), fully implemented in the digital domain. The proposed design follows the ASIC design flow, from behavioral modeling to physical layout generation.